[PATCH v2 3/3] arm64: dts: rockchip: add Repka Pi 5 board
Mikhail Bessonov
heliumium1997 на gmail.com
Чт Авг 6 13:23:24 MSK 2026
---
arch/arm64/boot/dts/rockchip/Makefile | 1 +
.../boot/dts/rockchip/rk3588-repka-pi5.dts | 773 ++++++++++++++++++
2 files changed, 774 insertions(+)
create mode 100644 arch/arm64/boot/dts/rockchip/rk3588-repka-pi5.dts
diff --git a/arch/arm64/boot/dts/rockchip/Makefile
b/arch/arm64/boot/dts/rockchip/Makefile
index ad684e3831bc..ae12dc2ef75a 100644
--- a/arch/arm64/boot/dts/rockchip/Makefile
+++ b/arch/arm64/boot/dts/rockchip/Makefile
@@ -181,6 +181,7 @@ dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-orangepi-5-max.=
dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-orangepi-5-plus.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-orangepi-5-ultra.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-quartzpro64.dtb
+dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-repka-pi5.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-roc-rt.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5-itx.dtb
dtb-$(CONFIG_ARCH_ROCKCHIP) +=3D rk3588-rock-5b.dtb
diff --git a/arch/arm64/boot/dts/rockchip/rk3588-repka-pi5.dts
b/arch/arm64/boot/dts/rockchip/rk3588-repka-pi5.dts
new file mode 100644
index 000000000000..4e4207108dbf
--- /dev/null
+++ b/arch/arm64/boot/dts/rockchip/rk3588-repka-pi5.dts
@@ -0,0 +1,773 @@
+// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
+
+/dts-v1/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+#include <dt-bindings/soc/rockchip,vop2.h>
+#include "rk3588.dtsi"
+
+/ {
+ model =3D "Repka Pi 5";
+ compatible =3D "repka,pi5", "rockchip,rk3588";
+
+ aliases {
+ ethernet0 =3D &gmac1;
+ mmc0 =3D &sdmmc;
+ mmc1 =3D &sdhci;
+ mmc2 =3D &sdio;
+ };
+
+ chosen {
+ stdout-path =3D "serial2:1500000n8";
+ };
+
+ analog_sound: analog-sound {
+ compatible =3D "simple-audio-card";
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&hp_det>;
+ simple-audio-card,name =3D "Repka Pi 5 ES8388";
+ simple-audio-card,format =3D "i2s";
+ simple-audio-card,hp-det-gpios =3D
+ <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>;
+ simple-audio-card,mclk-fs =3D <256>;
+ simple-audio-card,routing =3D
+ "Headphones", "LOUT1",
+ "Headphones", "ROUT1",
+ "LINPUT1", "Headset Mic",
+ "RINPUT1", "Headset Mic";
+ simple-audio-card,widgets =3D
+ "Headphone", "Headphones",
+ "Microphone", "Headset Mic";
+
+ simple-audio-card,cpu {
+ sound-dai =3D <&i2s0_8ch>;
+ };
+
+ simple-audio-card,codec {
+ sound-dai =3D <&es8388>;
+ system-clock-frequency =3D <12288000>;
+ };
+ };
+
+ hdmi0_con: hdmi0-connector {
+ compatible =3D "hdmi-connector";
+ type =3D "a";
+
+ port {
+ hdmi0_con_in: endpoint {
+ remote-endpoint =3D <&hdmi0_out_con>;
+ };
+ };
+ };
+
+ fan: pwm-fan {
+ compatible =3D "pwm-fan";
+ cooling-levels =3D <0 80 120 180 255>;
+ fan-supply =3D <&vcc5v0_sys>;
+ interrupt-parent =3D <&gpio4>;
+ interrupts =3D <RK_PA7 IRQ_TYPE_EDGE_FALLING>;
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&fan_tach>;
+ pulses-per-revolution =3D <2>;
+ pwms =3D <&pwm13 0 40000 0>;
+ #cooling-cells =3D <2>;
+ };
+
+ vcc5v0_sys: regulator-vcc5v0-sys {
+ compatible =3D "regulator-fixed";
+ regulator-name =3D "vcc5v0_sys";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <5000000>;
+ regulator-max-microvolt =3D <5000000>;
+ };
+
+ vcc5v0_usb: regulator-vcc5v0-usb {
+ compatible =3D "regulator-fixed";
+ regulator-name =3D "vcc5v0_usb";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <5000000>;
+ regulator-max-microvolt =3D <5000000>;
+ vin-supply =3D <&vcc5v0_sys>;
+ };
+
+ sdio_pwrseq: sdio-pwrseq {
+ compatible =3D "mmc-pwrseq-simple";
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&wifi_enable_h>;
+ post-power-on-delay-ms =3D <200>;
+ reset-gpios =3D <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&combphy2_psu {
+ status =3D "okay";
+};
+
+&cpu_l0 {
+ cpu-supply =3D <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l1 {
+ cpu-supply =3D <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l2 {
+ cpu-supply =3D <&vdd_cpu_lit_s0>;
+};
+
+&cpu_l3 {
+ cpu-supply =3D <&vdd_cpu_lit_s0>;
+};
+
+&gmac1 {
+ clock_in_out =3D "output";
+ phy-handle =3D <&rgmii_phy1>;
+ /* The PCB adds no RX clock delay; let the PHY add it. */
+ phy-mode =3D "rgmii-rxid";
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&gmac1_miim
+ &gmac1_tx_bus2
+ &gmac1_rx_bus2
+ &gmac1_rgmii_clk
+ &gmac1_rgmii_bus>;
+ rx_delay =3D <0x00>;
+ tx_delay =3D <0x42>;
+ status =3D "okay";
+};
+
+&gpu {
+ mali-supply =3D <&vdd_gpu_s0>;
+ status =3D "okay";
+};
+
+&hdmi0 {
+ status =3D "okay";
+};
+
+&hdmi0_in {
+ hdmi0_in_vp0: endpoint {
+ remote-endpoint =3D <&vp0_out_hdmi0>;
+ };
+};
+
+&hdmi0_out {
+ hdmi0_out_con: endpoint {
+ remote-endpoint =3D <&hdmi0_con_in>;
+ };
+};
+
+&hdmi0_sound {
+ status =3D "okay";
+};
+
+&hdptxphy0 {
+ status =3D "okay";
+};
+
+&i2c3 {
+ clock-frequency =3D <400000>;
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&i2c3m0_xfer>;
+ status =3D "okay";
+
+ es8388: audio-codec на 11 {
+ compatible =3D "everest,es8388", "everest,es8328";
+ reg =3D <0x11>;
+ AVDD-supply =3D <&vcc_3v3_s0>;
+ DVDD-supply =3D <&vcc_1v8_s0>;
+ HPVDD-supply =3D <&vcc_3v3_s0>;
+ PVDD-supply =3D <&vcc_1v8_s0>;
+ clocks =3D <&cru I2S0_8CH_MCLKOUT>;
+ assigned-clocks =3D <&cru I2S0_8CH_MCLKOUT>;
+ assigned-clock-rates =3D <12288000>;
+ #sound-dai-cells =3D <0>;
+ };
+};
+
+&i2c6 {
+ clock-frequency =3D <100000>;
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&i2c6m0_xfer>;
+ status =3D "okay";
+
+ hym8563: rtc на 51 {
+ compatible =3D "haoyu,hym8563";
+ reg =3D <0x51>;
+ #clock-cells =3D <0>;
+ clock-output-names =3D "hym8563";
+ interrupt-parent =3D <&gpio0>;
+ interrupts =3D <RK_PB0 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&hym8563_int>;
+ status =3D "okay";
+ };
+};
+
+&i2s0_8ch {
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&i2s0_lrck
+ &i2s0_mclk
+ &i2s0_sclk
+ &i2s0_sdi0
+ &i2s0_sdo0>;
+ status =3D "okay";
+};
+
+&i2s5_8ch {
+ status =3D "okay";
+};
+
+&mdio1 {
+ rgmii_phy1: ethernet-phy на 1 {
+ compatible =3D "ethernet-phy-ieee802.3-c22";
+ reg =3D <1>;
+ reset-assert-us =3D <20000>;
+ reset-deassert-us =3D <100000>;
+ reset-gpios =3D <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>;
+ };
+};
+
+&package_thermal {
+ polling-delay =3D <1000>;
+
+ trips {
+ package_fan0: package-fan0 {
+ temperature =3D <55000>;
+ hysteresis =3D <2000>;
+ type =3D "active";
+ };
+
+ package_fan1: package-fan1 {
+ temperature =3D <65000>;
+ hysteresis =3D <2000>;
+ type =3D "active";
+ };
+ };
+
+ cooling-maps {
+ map0 {
+ cooling-device =3D <&fan THERMAL_NO_LIMIT 1>;
+ trip =3D <&package_fan0>;
+ };
+
+ map1 {
+ cooling-device =3D <&fan 2 THERMAL_NO_LIMIT>;
+ trip =3D <&package_fan1>;
+ };
+ };
+};
+
+&pinctrl {
+ fan {
+ fan_tach: fan-tach {
+ rockchip,pins =3D <4 RK_PA7 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ hym8563 {
+ hym8563_int: hym8563-int {
+ rockchip,pins =3D
+ <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>;
+ };
+ };
+
+ sound {
+ hp_det: hp-det {
+ rockchip,pins =3D <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+
+ wifi {
+ wifi_enable_h: wifi-enable-h {
+ rockchip,pins =3D <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>;
+ };
+ };
+};
+
+&pwm13 {
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&pwm13m1_pins>;
+ status =3D "okay";
+};
+
+&saradc {
+ vref-supply =3D <&vcc_1v8_s0>;
+ status =3D "okay";
+};
+
+&sdhci {
+ bus-width =3D <8>;
+ cap-mmc-highspeed;
+ max-frequency =3D <200000000>;
+ mmc-hs200-1_8v;
+ mmc-hs400-1_8v;
+ mmc-hs400-enhanced-strobe;
+ no-sd;
+ no-sdio;
+ non-removable;
+ vmmc-supply =3D <&vcc_3v3_s3>;
+ vqmmc-supply =3D <&vcc_1v8_s3>;
+ status =3D "okay";
+};
+
+&sdio {
+ bus-width =3D <4>;
+ cap-sd-highspeed;
+ cap-sdio-irq;
+ disable-wp;
+ keep-power-in-suspend;
+ max-frequency =3D <25000000>;
+ mmc-pwrseq =3D <&sdio_pwrseq>;
+ no-mmc;
+ no-sd;
+ non-removable;
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&sdiom0_pins>;
+ wakeup-source;
+ status =3D "okay";
+};
+
+&sdmmc {
+ broken-cd;
+ bus-width =3D <4>;
+ cap-sd-highspeed;
+ disable-wp;
+ max-frequency =3D <50000000>;
+ no-mmc;
+ no-sdio;
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&sdmmc_clk &sdmmc_cmd &sdmmc_bus4>;
+ vmmc-supply =3D <&vcc_3v3_s3>;
+ vqmmc-supply =3D <&vccio_sd_s0>;
+ status =3D "okay";
+};
+
+&spi2 {
+ assigned-clocks =3D <&cru CLK_SPI2>;
+ assigned-clock-rates =3D <200000000>;
+ num-cs =3D <1>;
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&spi2m2_cs0 &spi2m2_pins>;
+ status =3D "okay";
+
+ pmic на 0 {
+ compatible =3D "rockchip,rk806";
+ reg =3D <0>;
+ gpio-controller;
+ #gpio-cells =3D <2>;
+ interrupt-parent =3D <&gpio0>;
+ interrupts =3D <RK_PA7 IRQ_TYPE_LEVEL_LOW>;
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&pmic_pins>, <&rk806_dvs1_null>,
+ <&rk806_dvs2_null>, <&rk806_dvs3_null>;
+ spi-max-frequency =3D <1000000>;
+ system-power-controller;
+
+ vcc1-supply =3D <&vcc5v0_sys>;
+ vcc2-supply =3D <&vcc5v0_sys>;
+ vcc3-supply =3D <&vcc5v0_sys>;
+ vcc4-supply =3D <&vcc5v0_sys>;
+ vcc5-supply =3D <&vcc5v0_sys>;
+ vcc6-supply =3D <&vcc5v0_sys>;
+ vcc7-supply =3D <&vcc5v0_sys>;
+ vcc8-supply =3D <&vcc5v0_sys>;
+ vcc9-supply =3D <&vcc5v0_sys>;
+ vcc10-supply =3D <&vcc5v0_sys>;
+ vcc11-supply =3D <&vcc_2v0_pldo_s3>;
+ vcc12-supply =3D <&vcc5v0_sys>;
+ vcc13-supply =3D <&vdd2_ddr_s3>;
+ vcc14-supply =3D <&vdd2_ddr_s3>;
+ vcca-supply =3D <&vcc5v0_sys>;
+
+ rk806_dvs1_null: dvs1-null-pins {
+ pins =3D "gpio_pwrctrl1";
+ function =3D "pin_fun0";
+ };
+
+ rk806_dvs2_null: dvs2-null-pins {
+ pins =3D "gpio_pwrctrl2";
+ function =3D "pin_fun0";
+ };
+
+ rk806_dvs3_null: dvs3-null-pins {
+ pins =3D "gpio_pwrctrl3";
+ function =3D "pin_fun0";
+ };
+
+ regulators {
+ vdd_gpu_s0: dcdc-reg1 {
+ regulator-name =3D "vdd_gpu_s0";
+ regulator-boot-on;
+ regulator-enable-ramp-delay =3D <400>;
+ regulator-min-microvolt =3D <550000>;
+ regulator-max-microvolt =3D <950000>;
+ regulator-ramp-delay =3D <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_cpu_lit_s0: dcdc-reg2 {
+ regulator-name =3D "vdd_cpu_lit_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <550000>;
+ regulator-max-microvolt =3D <950000>;
+ regulator-ramp-delay =3D <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_log_s0: dcdc-reg3 {
+ regulator-name =3D "vdd_log_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <675000>;
+ regulator-max-microvolt =3D <825000>;
+ regulator-ramp-delay =3D <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt =3D <750000>;
+ };
+ };
+
+ vdd_vdenc_s0: dcdc-reg4 {
+ regulator-name =3D "vdd_vdenc_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <550000>;
+ regulator-max-microvolt =3D <825000>;
+ regulator-ramp-delay =3D <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_ddr_s0: dcdc-reg5 {
+ regulator-name =3D "vdd_ddr_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <675000>;
+ regulator-max-microvolt =3D <900000>;
+ regulator-ramp-delay =3D <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt =3D <850000>;
+ };
+ };
+
+ vdd2_ddr_s3: dcdc-reg6 {
+ regulator-name =3D "vdd2_ddr_s3";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ };
+ };
+
+ vcc_2v0_pldo_s3: dcdc-reg7 {
+ regulator-name =3D "vdd_2v0_pldo_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <2000000>;
+ regulator-max-microvolt =3D <2000000>;
+ regulator-ramp-delay =3D <12500>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt =3D <2000000>;
+ };
+ };
+
+ vcc_3v3_s3: dcdc-reg8 {
+ regulator-name =3D "vcc_3v3_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <3300000>;
+ regulator-max-microvolt =3D <3300000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt =3D <3300000>;
+ };
+ };
+
+ vddq_ddr_s0: dcdc-reg9 {
+ regulator-name =3D "vddq_ddr_s0";
+ regulator-always-on;
+ regulator-boot-on;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_1v8_s3: dcdc-reg10 {
+ regulator-name =3D "vcc_1v8_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <1800000>;
+ regulator-max-microvolt =3D <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt =3D <1800000>;
+ };
+ };
+
+ avcc_1v8_s0: pldo-reg1 {
+ regulator-name =3D "avcc_1v8_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <1800000>;
+ regulator-max-microvolt =3D <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt =3D <1800000>;
+ };
+ };
+
+ vcc_1v8_s0: pldo-reg2 {
+ regulator-name =3D "vcc_1v8_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <1800000>;
+ regulator-max-microvolt =3D <1800000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt =3D <1800000>;
+ };
+ };
+
+ avdd_1v2_s0: pldo-reg3 {
+ regulator-name =3D "avdd_1v2_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <1200000>;
+ regulator-max-microvolt =3D <1200000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vcc_3v3_s0: pldo-reg4 {
+ regulator-name =3D "vcc_3v3_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <3300000>;
+ regulator-max-microvolt =3D <3300000>;
+ regulator-ramp-delay =3D <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vccio_sd_s0: pldo-reg5 {
+ regulator-name =3D "vccio_sd_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <1800000>;
+ regulator-max-microvolt =3D <3300000>;
+ regulator-ramp-delay =3D <12500>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ pldo6_s3: pldo-reg6 {
+ regulator-name =3D "pldo6_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <1800000>;
+ regulator-max-microvolt =3D <1800000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt =3D <1800000>;
+ };
+ };
+
+ vdd_0v75_s3: nldo-reg1 {
+ regulator-name =3D "vdd_0v75_s3";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <750000>;
+ regulator-max-microvolt =3D <750000>;
+
+ regulator-state-mem {
+ regulator-on-in-suspend;
+ regulator-suspend-microvolt =3D <750000>;
+ };
+ };
+
+ vdd_ddr_pll_s0: nldo-reg2 {
+ regulator-name =3D "vdd_ddr_pll_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <850000>;
+ regulator-max-microvolt =3D <850000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ regulator-suspend-microvolt =3D <850000>;
+ };
+ };
+
+ avdd_0v75_s0: nldo-reg3 {
+ regulator-name =3D "avdd_0v75_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <825000>;
+ regulator-max-microvolt =3D <825000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v85_s0: nldo-reg4 {
+ regulator-name =3D "vdd_0v85_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <850000>;
+ regulator-max-microvolt =3D <850000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+
+ vdd_0v75_s0: nldo-reg5 {
+ regulator-name =3D "vdd_0v75_s0";
+ regulator-always-on;
+ regulator-boot-on;
+ regulator-min-microvolt =3D <750000>;
+ regulator-max-microvolt =3D <750000>;
+
+ regulator-state-mem {
+ regulator-off-in-suspend;
+ };
+ };
+ };
+ };
+};
+
+&tsadc {
+ status =3D "okay";
+};
+
+&u2phy0 {
+ status =3D "okay";
+};
+
+&u2phy0_otg {
+ phy-supply =3D <&vcc5v0_usb>;
+ status =3D "okay";
+};
+
+&u2phy1 {
+ status =3D "okay";
+};
+
+&u2phy1_otg {
+ phy-supply =3D <&vcc5v0_usb>;
+ status =3D "okay";
+};
+
+&u2phy2 {
+ status =3D "okay";
+};
+
+&u2phy2_host {
+ phy-supply =3D <&vcc5v0_usb>;
+ status =3D "okay";
+};
+
+&u2phy3 {
+ status =3D "okay";
+};
+
+&u2phy3_host {
+ phy-supply =3D <&vcc5v0_usb>;
+ status =3D "okay";
+};
+
+&uart2 {
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&uart2m0_xfer>;
+ status =3D "okay";
+};
+
+&uart9 {
+ pinctrl-names =3D "default";
+ pinctrl-0 =3D <&uart9m0_xfer &uart9m0_ctsn>;
+ status =3D "okay";
+};
+
+&usbdp_phy0 {
+ status =3D "okay";
+};
+
+&usbdp_phy1 {
+ status =3D "okay";
+};
+
+&usb_host0_ehci {
+ status =3D "okay";
+};
+
+&usb_host0_ohci {
+ status =3D "okay";
+};
+
+&usb_host0_xhci {
+ dr_mode =3D "host";
+ status =3D "okay";
+};
+
+&usb_host1_ehci {
+ status =3D "okay";
+};
+
+&usb_host1_ohci {
+ status =3D "okay";
+};
+
+&usb_host1_xhci {
+ dr_mode =3D "host";
+ status =3D "okay";
+};
+
+&usb_host2_xhci {
+ status =3D "okay";
+};
+
+&vop {
+ status =3D "okay";
+};
+
+&vop_mmu {
+ status =3D "okay";
+};
+
+&vp0 {
+ vp0_out_hdmi0: endpoint на ROCKCHIP_VOP2_EP_HDMI0 {
+ reg =3D <ROCKCHIP_VOP2_EP_HDMI0>;
+ remote-endpoint =3D <&hdmi0_in_vp0>;
+ };
+};
--
2.50.1
On Thu, Aug 6, 2026 at 2:41=E2=80=AFPM =D0=9C=D0=B8=D1=88=D0=B0=D0=BD=D1=8F=
=D0=91=D0=B5=D1=81=D1=81=D0=BE=D0=BD=D0=BE=D0=B2 <heliumium1997 на gmail.com>=
wrote:
>
> From cd089005dfdd940888bf3dffbb41270989252ce1 Mon Sep 17 00:00:00 2001
> In-Reply-To: <anM6uhmsa0NKvKR5 на iv-work>
> References: <anM6uhmsa0NKvKR5 на iv-work>
> From: Mikhail Bessonov <heliumium1997 на gmail.com>
> Date: Thu, 6 Aug 2026 10:23:18 +0000
> Subject: [PATCH v2 2/3] config-aarch64: enable ARM PSCI CPU idle driver
>
> Enable the ARM PSCI CPU idle driver so RK3588 CPUs can use
> firmware-described idle states.
>
> Signed-off-by: Mikhail Bessonov <heliumium1997 на gmail.com>
> ---
> config-aarch64 | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/config-aarch64 b/config-aarch64
> index 8a73a3fa40b7..5ae5e0146448 100644
> --- a/config-aarch64
> +++ b/config-aarch64
> @@ -131,7 +131,7 @@ CONFIG_CPU_PM=3Dy
> CONFIG_CPU_IDLE_MULTIPLE_DRIVERS=3Dy
> CONFIG_DT_IDLE_STATES=3Dy
> CONFIG_ARM_CPUIDLE=3Dy
> -# CONFIG_ARM_PSCI_CPUIDLE is not set
> +CONFIG_ARM_PSCI_CPUIDLE=3Dy
> CONFIG_CPUFREQ_DT=3Dm
> CONFIG_CPUFREQ_DT_PLATDEV=3Dy
> CONFIG_ACPI_CPPC_CPUFREQ=3Dm
> --
> 2.50.1
>
> On Thu, Aug 6, 2026 at 2:41=E2=80=AFPM =D0=9C=D0=B8=D1=88=D0=B0=D0=BD=D1=
=8F =D0=91=D0=B5=D1=81=D1=81=D0=BE=D0=BD=D0=BE=D0=B2 <heliumium1997 на gmail.c=
om> wrote:
> >
> > [PATCH v2 1/3] config: increase 8250 runtime UARTs to 32
> >
> > From c37d7bde7843851d539ccb478573d1a365a3a9bf Mon Sep 17 00:00:00 2001
> > In-Reply-To: <anM6uhmsa0NKvKR5 на iv-work>
> > References: <anM6uhmsa0NKvKR5 на iv-work>
> > From: Mikhail Bessonov <heliumium1997 на gmail.com>
> > Date: Thu, 6 Aug 2026 10:23:13 +0000
> > Subject: [PATCH v2 1/3] config: increase 8250 runtime UARTs to 32
> >
> > The RK3588 serial aliases expose the Repka Pi 5 Bluetooth controller as
> > serial9. The current runtime limit only creates ttyS0 through ttyS7,
> > leaving ttyS9 unavailable even when UART9 is enabled in the device tree=
.
> >
> > Raise the runtime 8250 limit to 32 while keeping the maximum at 192.
> >
> > Signed-off-by: Mikhail Bessonov <heliumium1997 на gmail.com>
> > ---
> > config | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/config b/config
> > index 20abb3e74805..155d40a49d13 100644
> > --- a/config
> > +++ b/config
> > @@ -4354,7 +4354,7 @@ CONFIG_SERIAL_8250_EXAR=3Dy
> > CONFIG_SERIAL_8250_CS=3Dm
> > # CONFIG_SERIAL_8250_MEN_MCB is not set
> > CONFIG_SERIAL_8250_NR_UARTS=3D192
> > -CONFIG_SERIAL_8250_RUNTIME_UARTS=3D8
> > +CONFIG_SERIAL_8250_RUNTIME_UARTS=3D32
> > CONFIG_SERIAL_8250_EXTENDED=3Dy
> > CONFIG_SERIAL_8250_MANY_PORTS=3Dy
> > CONFIG_SERIAL_8250_SHARE_IRQ=3Dy
> > --
> > 2.50.1
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